【计算机体系结构若干题目（1）1.Asuperscalarprocessorhas()(a)multiplefunctionalunits(b)ahighclockspeed(c)alargeamountofRAM(d)manyI/Oports2.On-chipcachehas()(a)loweraccesstimethanRAM(b)largercapacitythano】

计算机体系结构若干题目（1）

1.Asuperscalarprocessorhas()

(a)multiplefunctionalunits(b)ahighclockspeed

(c)alargeamountofRAM(d)manyI/Oports

2.On-chipcachehas()

(a)loweraccesstimethanRAM(b)largercapacitythanoffchipcache

(c)itsowndatabus(d)becomeobsolete

3.()datahazardsarenotpossibleintheDLXin-orderinstructionissueandin-orderexecutionmulticyclepipeline?

(a)WARx05(b)WAW(c)RAW(d)RAR

4.PipeliningimprovesCPUperformancedueto()

(a)reducedmemoryaccesstime(b)increasedclockspeed

(c)theintroductionofparallellism(d)additionalfunctionalunits

5.Cachememoryenhances()

(a)memorycapacity(b)memoryaccesstime

(c)secondarystoragecapacity(d)secondarystorageaccesstime

6.RISCmachinestypically()

(a)havehighcapacityon-chipcachememories(b)havefewerregistersthanCISCmachines(c)arelessreliablethanCISCmachines(d)execute1instructionperclockcycle.

7.WhichofthefollowingisNOTacomputerperformancemetric:()

(a)MIPS(b)FLOPS(c)SPECbenchmark(d)RISC

8.Givena5stagepipelinewithstagestaking1,2,3,1,1unitsoftime,theclockperiodofthepipelineis:()

(a)8(b)1/8(c)1/3(d)3

9.Theaveragememoryaccesstimeforamachinewithacachehitrateof90%wherethecacheaccesstimeis10nsandthememoryaccesstimeis100nsis()

(a)55ns(b)45ns(c)90ns(d)19ns

10.Delayedbranchingisused()

(a)tointroducedelaysinprogramexecution(b)inpipelining

(c)incachememory(d)decodinginstructions

Part2—FundamentalsofComputerDesign[10points]

1.[10points]Inmanypracticalapplicationsthatdemandareal-timeresponse,thecomputationalworkloadWisoftenfixed.Asthenumberofprocessorsincreasesinaparallelcomputer,thefixedworkloadisdistributedtomoreprocessorsforparallelexecution.Assume20percentofWmustbeexecutedsequentially,and80percentcanbeexecutedby4nodessimultaneously.Whatisafixed-loadspeedup?

Part3—InstructionSetArchitecture[20points]

2.[8points